[OpenPOWER-HDL-Cores] missing information from power 3.0B public spec

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sat Mar 28 18:45:01 UTC 2020

hi folks i don't know where this should be posted.

context: V3.0B public, p69, chap 3, section 3.3.9

Add Immediate Carrying and Record

this - the pseudocode - is identical to addic.  the sole exclusive
difference between the two sections: mention of CR0.

however... there's no mention of how CR0 is produced.  this kind of
thing - implictly-understood knowledge - is something that stresses
out my nit-picking literal-minded brain.  references at the beginning
of the supersection to CR0 remind me of the famous joke language "GO
FROM" construct :)

if latex were being used, a \ref tag could be inserted on the mention
of CR0 in the "Special Registers" section that allows them to click
and follow, directly, to where CR0's meaning is explained.


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