[OpenPOWER-HDL-Cores] missing information from power 3.0B public spec
paulus at ozlabs.org
Mon Mar 30 03:23:58 UTC 2020
On Sat, Mar 28, 2020 at 06:45:01PM +0000, Luke Kenneth Casson Leighton wrote:
> hi folks i don't know where this should be posted.
> context: V3.0B public, p69, chap 3, section 3.3.9
> Add Immediate Carrying and Record
> this - the pseudocode - is identical to addic. the sole exclusive
> difference between the two sections: mention of CR0.
> however... there's no mention of how CR0 is produced. this kind of
That is described in 3.3.8, with a reference from the first paragraph
> thing - implictly-understood knowledge - is something that stresses
> out my nit-picking literal-minded brain. references at the beginning
> of the supersection to CR0 remind me of the famous joke language "GO
> FROM" construct :)
CR0 is defined in section 2.3.1.
The architecture aims more at completeness and precision than easy
understandability. In the old days there was the Programming
Environments Manual that Motorola did, which was much more about
explaining and teaching than the architecture spec. I don't think it
ever got updated with the 64-bit instructions, though.
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