[OpenPOWER-HDL-Cores] decode1.vhdl copyright for use in binutils
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Mar 15 01:36:14 UTC 2021
Anton, Paul, Mikey, we have an interesting situation
as you know i have used decode1.vhdl to create CSV files. the CSV files
are connected to de sv_analysis.py. the sv_analysis.py is connected to de
SVP64 autogeneration... dem bones dem bones dem... dry bones... sorry
couldn't help it :)
the next phase is to autogenerate the binutils gas struct which helps
decode SVP64 assembly syntax and turn it into an EXT01 form.
except... binutils is quite strict about copyright assignment.
given the sheer overwhelming number of fields it would be unwise and unsafe
to type them all out again.
no, unfortunately, autogenerated output cannot be added to GNU projects due
to the provenance being unclear, unreproducible, and if someone edits the
autogenerated output it's even worse.
IBM it turns out already has an agreement with the FSF regarding copyright
assignment. could decode1.vhdl be added to that list?
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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